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Highest honor for electronics R&D in France recognizes work on next-generation semiconductor process technology
December 12, 2012
By: DAVID SAVASTANO
Contributing Editor, Coatings World and Ink World
STMicroelectronics and CEA-Leti, France’s premier research and technology institute, announced that a team of ST and CEA-Leti researchers had received the 2012 Général Ferrié Award. Considered to be the highest award in electronics R&D in France, the Général Ferrié annual award honors an engineer or a scientific team whose work has made a significant contribution to the progress of electronics and its applications. The team members presented were Claire Fenouillet-Béranger and Olivier Faynot from Leti, and Stéphane Monfray and Frédéric Bœuf from ST. They were honored for their work on FD-SOI (Fully Depleted Silicon-On-Insulator) technology, a major technological breakthrough in the pursuit of miniaturization of electronic circuits. Since the beginning of the 1960s, the chip industry’s efforts to meet the growing demand for computing power have followed Moore’s Law, which recognized that the number of transistors on integrated circuits doubles approximately every two years. However, the industry today faces a major constraint: the growing difficulty to control the electrical behavior of transistors once their size shrinks below 100nm. Work begun around the turn of the century by the advanced-modules teams at ST and Leti has made it possible to quantify the improvement that new methods bring to conventional transistor performance. Over time, the idea of making transistors on a substrate of ultra-thin silicon resting on an insulator was developed as an alternative to making transistors on thicker silicon without the insulator. The result was FD-SOI. This planar technology uses manufacturing processes that are already in place for conventional technologies. Other approaches, including one calledFinFET, require disruptive changes to design techniques and process technologies because it relies on 3-D transistors. In fact, the four researchers were able to validate the technological choice for FD-SOI, while also enabling its industrialization. They identified three key advantages to this approach: • The production process is very close to that used in existing standard technologies (“Bulk” for silicon monocrystalline substrates). • The transfer of circuit designs from bulk to FD-SOI technology is significantly easier than with FinFET, because the approach continues to use a planar geometry. • This technology is very attractive for mobile applications such as smartphones and tablets, which simultaneously require high performance and low power consumption. “This award acknowledges more than 20 years of Leti’s R&D work on SOI,” said Laurent Malier, CEO of Leti. “Leti is very proud to have succeeded in developing this technology through to the industrial level and to have made it an excellent candidate for components that are being integrated into mobile devices for the ideal compromise they allow between speed and power consumption.” “The perseverance and quality in the work of Claire, Frédéric, Olivier and Stéphane, at the heart of the advanced-component teams, demonstrated different transistor concepts for thin-film and overcame all obstacles to industrialization,” Thomas Skotnicki, director advanced devices, ST and IEEE Fellow, said. “In an industry of fierce global competition striving to continually miniaturize components, I am particularly proud to see this long cooperation between CEA and ST rewarded,” ST executive vice president Joël Hartmann, head of front-end manufacturing and process R&D, Digital Sector, added.
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