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Imec Shows Path Towards Non-Si Devices at IEDM 2012

Addresses key challenges of scaling beyond silicon-channel finFETs

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By: DAVID SAVASTANO

Contributing Editor, Coatings World and Ink World

At IEEE International Electron Devices Meeting (IEDM 2012), imec addressed key challenges of scaling beyond silicon-channel finFETs. Imec showed that channel mobility can be boosted by growing non-Si channels on a strain relaxed buffer (SRB), and demonstrated excellent scalability potential of the technology. Moreover, imec revealed insight on the unique influence oxide trapping has on the gate stack mobility in High-Mobility Ge and III-V channels.

For logic device technology, the industry previously used SiGe source/drain stressors to enhance the Si channel mobility. However, this process is reaching its scalability limits due to lay-out dependent defects. At IEDM 2012, imec demonstrated excellent scalability toward the 1nm/10nm and 7nm nodes with Ge-channel FinFETs through a Si fin replacement process. Imec also delivered significant mobility boosts (of at least 50 percent) when growing a Ge channel on a SiGe 75 percent localized strain relaxed buffer, compared to strained Si channels.

“With each new technology generation, challenges are immense. And imec has always come up with solutions to extend Moore’s law,” stated Aaron Thean, director, logic program at imec. “Moving on towards the 14nm node and beyond, we are confident that again, we will find solutions for the challenges that lie ahead. We are looking into high-mobility channel materials, such as Ge and III/V compounds, focusing on two main challenges namely how to implement non-Si materials into the device architecture and how to overcome some of the fundamental physics of the gate stack related to passivation.”

These results were obtained in cooperation with imec’s key partners in its core CMOS programs: Globalfoundries, INTEL, Micron, Panasonic, Samsung, TSMC, Elpida, SK Hynix, Fujitsu, Toshiba/Sandisk and Sony.

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