Imec Showcases Technology Leadership at IEDM 2013

Imec is prominently present at this year’s IEEE International Electron Device Meeting (IEDM 2013) in Washington, D.C. with as many as 19 papers from imec researchers as first author or co-author, one tutorial, one course, two panels and three co-chairs. This confirms its integral role as global R&D center imec helping the semiconductor industry to solve the key challenges of advanced logic and memory scaling.

Imec’s IEDM 2013 papers on Advanced Logic Scaling:
• 4.2. A New Complementary Hetero-Junction Vertical Tunnel-FET Integration Scheme, R. Rooyackers et al.
• 12.3. Quantum-Barriers and Ground-Plane Isolation: A Path for Scaling Bulk-FinFET Technologies to the 7 nm-node and Beyond, G. Eneman et al.
• 12.8. Copper Through Silicon Via Induced Keep Out Zone for 10nm Node Bulk FinFET CMOS Technology, W. Guo et al.
• 15.2. Understanding the Suppressed Charge Trapping in Relaxed- and Strained-Ge/SiO2/HfO2 pMOSFETs and Implications for the Screening of Alternative High-Mobility Substrate/Dielectric CMOS Gate Stacks, J. Franco et al.
• 16.6 Impact of the Channel Thickness on the Performance of Ultrathin InGaAs Channel MOSFET Devices, A. Alian et al.
• 17.3 Impact of Multi-Gate Device Architectures on Digital and Analog Circuits and its Implications on System-On-Chip Technologies (Invited), A. Thean et al.
• 20.4 Strained Germanium Quantum Well pMOS FinFETs Fabricated on in-situ Phosphorus-Doped SiGe Strain Relaxed Buffer Layers Using a Replacement Fin Process, L. Witters et al.
• 20.6 Improved Sidewall Doping of Extensions by AsH3 Ion Assisted Deposition and Doping (IADD) with Small Implant Angle for Scaled NMOS Si Bulk FinFETs, Y. Sasaki et al.

Imec’s IEDM2013 papers on Advanced Memory Scaling:
• 10.1. Improvement of Data Retention in HfO2/Hf 1T1R RRAM Cell Under Low Operating Current, Y. Chen et al.
• 10.2. Vacancy-Modulated Conductive Oxide Resistive RAM (VMCO-RRAM): An Area-Scalable Switching Current, Self-Compliant, Highly-Nonlinear and Wide On/Off-Window Resistive Switching Cell, B. Govoreanu et al.
• 21.1 Stochastic Variability of Vacancy Filament Configuration in Ultra-Thin Dielectric RRAM and its Impact on OFF-State Reliability, N. Raghavan et al.
• 21.2 Characterizing Grain Size and Defect Energy Distribution in Vertical SONOS Poly-Si Channels by Means of a Resistive Network Model, R. Degraeve et al.
• 21.3 Statistical Spectroscopy of Switching Traps in Deeply Scaled Vertical Poly-Si Channel for 3D Memories, M. Toledano-Luque et al.
• 21.6 Conductive-AFM Tomography for 3D Filament Observation in Resistive Switching Devices, U. Celano et al.

Imec’s IEDM2013 paper on thin-film transistors:
• 11.3. Integrated UHF a-IGZO Energy Harvester for Passive RFID Tags, A. Chasin et al.

Imec’s contributions to IEDM2013 papers as co-author:
• 5.7. Analysis of Dopant Diffusion and Defects in Fin Structure Using an Atomistic Kinetic Monte Carlo Approach, T. Noda et al.
• 15.5. Hydrogen-Related Volatile Defects as the Possible Cause for the Recoverable Component of NBTI, T. Grasser et al.
• 15.6. Negative Bias Temperature Instability Lifetime Prediction: Problems and Solutions, Z. Ji et al.
• 31.3 Key Issues and Techniques for Characterizing Time-dependent Device-to-Device Variation of SRAM, M. Duan et al.

Tutorial 3: Energy Harvesting for Self-Powered Electronic Systems, Rob van Schaijk (imec/Holst Centre).
Short course: Challenges of 10nm and 7nm CMOS Technologies, Aaron Thean (organizer) and Zsolt Tokei (co-instructor).

Session 23: Evening Panel: Is there life beyond conventional CMOS? Marc Heyns (panelist).
Session 24: Evening Panel : Will Voltage Scaling in CMOS Technology Continue Beyond 14nm Generation? An Steegen (panelist).

Session 7: Characterization, Reliability, and Yield – Novel Technology Characterization, Ben Kaczer (co-chair).
Session 27: Display and Imaging Systems – Display and Imaging Devices Piet De Moor (co-chair).
Session 16: Power and Compound Semiconductor Devices – III-V Logic, Niamh Waldron (co-chair).